|Subject Area||Computer Hardware and Architecture|
|Semester||Semester 6 – Spring|
- Introduction to VLSI ASIC Design
- Timing Design
- Design of digital hardware using Verilog HDL
- Design of complex systems
- Hierarchy and Partitioning
- Finite State Machines
- Test Benches and Verification
- Low Power Design
- Design for Test
The main objectives of the course are:
- To give the student a basic understanding of CAD tool flows and methodologies involved in VLSI System Design
- To give the student an understanding of the trends and current problems in VLSI design based on transistor fabrication technologies.
- To prepare the student to have the technical knowledge to work as an entry-level industrial standard cell ASIC or FPGA designer.
- To give the student an understanding of issues and tools related to ASIC/FPGA design and implementation including timing, performance and power optimization, verification and manufacturing test.