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ECE119 Digital Design

Home » Studies » Undergraduate Studies » Undergraduate Courses » ECE119 Digital Design
Subject Area Computer Hardware and Architecture
Semester Semester 1 – Fall
Type Required
Teaching Hours 5
ECTS 6
Course Site https://courses.e-ce.uth.gr/CE130/
Course Director

Georgios Stamoulis, Professor
E-mail: georges@e-ce.uth.gr

Course Instructors
  • Georgios Stamoulis, Professor
    E-mail: georges@e-ce.uth.gr
  • Dimitris Karamperopoulos, Laboratory Teaching Staff
    E-mail: dkarabero@e-ce.uth.gr
  • Athanasios Fevgas, Laboratory Teaching Staff
    E-mail: fevgas@e-ce.uth.gr
  • Description
  • Learning Outcomes
  • Introduction to Boolean algebras
  • Basic combinational gates
  • Truth tables
  • Karnaugh maps
  • Quine-McCluskey algorithm
  • Other logic function representations (BDD, CNF)
  • Introduction toVerilog
  • Sequential gates and circuits
  • State diagrams and tables
  • Sequential circuit design
  • State minimization

This course aims to enable undergraduatestudent with ALL the fundamental knowledge that will allow them to follow the current developments in the field of Logic Design of Digital Circuits . It combines extensive reference to the theoretical basis of Boolean Algebra with introduction to the concepts of Algebraic Structures . The material is then focused on the study of combinatorial circuits without memory elements and covers design issues such as the minimization of combinational circuits of two or more variables and programmable combinational circuits. A comprehensive introduction to the design of sequential circuits followsincluding an introduction to memory elements accompanied by a large number of illustrative cases. Additionally, the laboratory exercises focus on VERILOG and its use programs for automated synthesis (Synopsys Design Compiler) as well asverificationof the correctness of the circuit design (SAT Solvers, BDDs).
Upon successful completion of this course the student will have a comprehensive knowledge of:

  • The basic concepts of Boolean algebra
  • Basic combinational and sequential elements
  • Logicfunctionrepresentation (truth tables, state tables and diagrams, BDD, CNF)
  • Design of small digital circuits and the related techniques (Karnaugh maps, discrete gate design)
  • Design methodologies for more complex circuits (Verilog, DesignCompiler, Quine-McCluskey algorithm)

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  • 37 Glavani – 28th October Str
  • Phone: +30 24210 74967
  • Fax: +30 24210 74997
  • Email: gece@e-ce.uth.gr

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