Subject Area | Computer Hardware and Architecture |
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Semester | Semester 1 – Fall |
Type | Required |
Teaching Hours | 5 |
ECTS | 6 |
Course Site | https://courses.e-ce.uth.gr/CE130/ |
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Course Instructors |
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Scientific Responsible |
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Title | MORCIC: Model Order Reduction of Electromagnetic Models for Large Integrated Circuits |
Duration | 2021 – 2023 |
Scientific Responsible |
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Title | SL-ReDu: Sign Language Recognition in Education |
Duration | 2020 – 2023 |
Site | https://sl-redu.e-ce.uth.gr/ |
Scientific Responsible |
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Title | Characterisation of LN2 UUI |
Duration | 2019 – 2023 |
Site | https://caslab.e-ce.uth.gr/ |
Scientific Responsible |
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Title | Qualcomm Faculty R&D Award 2019 |
Duration | 2019 – 2023 |
Site | https://caslab.e-ce.uth.gr/ |
Title | BigOptiBase |
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Duration | 2019 – 2022 |
Site | http://www.bigoptibase.gr/ |
Department of Electrical and Computer Engineering | |
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Tel. | +30 24210 74967 |
gece ΑΤ e-ce.uth.gr | |
PGS Tel. | +30 24210 74934 |
PGS e-mail | pgsec ΑΤ e-ce.uth.gr |
Fax | +30 24210 74997 |
Subject Area | Computer Hardware and Architecture |
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Semester | Semester 1 – Fall |
Type | Required |
Teaching Hours | 5 |
ECTS | 6 |
Course Site | https://courses.e-ce.uth.gr/CE130/ |
Course Director |
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Course Instructors |
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This course aims to enable undergraduatestudent with ALL the fundamental knowledge that will allow them to follow the current developments in the field of Logic Design of Digital Circuits . It combines extensive reference to the theoretical basis of Boolean Algebra with introduction to the concepts of Algebraic Structures . The material is then focused on the study of combinatorial circuits without memory elements and covers design issues such as the minimization of combinational circuits of two or more variables and programmable combinational circuits. A comprehensive introduction to the design of sequential circuits followsincluding an introduction to memory elements accompanied by a large number of illustrative cases. Additionally, the laboratory exercises focus on VERILOG and its use programs for automated synthesis (Synopsys Design Compiler) as well asverificationof the correctness of the circuit design (SAT Solvers, BDDs).
Upon successful completion of this course the student will have a comprehensive knowledge of: