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ECE425 Testing and Verification of Digital Circuits

Home » Studies » Undergraduate Studies » Undergraduate Courses » ECE425 Testing and Verification of Digital Circuits
Subject AreaComputer Hardware and Architecture
SemesterSemester 7 – Fall
TypeElective
Teaching Hours4
ECTS6
Recommended Courses
  • ECE119 Digital Design
  • ECE333 Digital Systms Lab
  • ECE431 CAD Algorithms
Course Sitehttp://eclass.uth.gr/eclass/courses/MHX228/
Course Director

Ioannis MountanosIoannis Mountanos, Associate Professor
E-mail: jmoondan@e-ce.uth.gr

Course Instructor
  • Ioannis Mountanos, Associate Professor
    E-mail: jmoondan@e-ce.uth.gr
  • Description
  • Learning Outcomes
  • Formal verification problem.
  • Formal verification Languages.
  • Binary Decision Diagrams (BDD), Reduced Ordered BDD (ROBDD).
  • Model Checking
  • Satisfiability checker.
  • Bounded Model Checking
  • Formal Equivalence Checking.
  • Fault modeling
  • Fault simulation
  • Combinational and Sequential ATPG
  • Design for test, Scan Design and Boundary scan standard

The main objectives of the course are:

  • To have a theoretical understanding of popular integrated circuits (IC) testing and formal verification algorithms.
  • To be able to incorporate appropriate testing & verification techniques into various phases of VLSI development.
  • To understand the usage of test and verification EDA software tools and their integration in a global design-flow.
  • To understand the necessity of VLSI testing and verification and to know standard methods applied in VLSI design.
  • To be able to apply appropriate testing methods in various phases of VLSI developments.

e-Yπηρεσίες

Contact Info

  • Sekeri – Cheiden Str, Pedion Areos, Volos
  • +30 24210 74967
  • +30 24210 74934
  • Email: gece@e-ce.uth.gr

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